Not Applicable
Not Applicable
1. Field of the Invention
This invention relates to optically coupled electronic integrated circuits, and more particularly to a method of packaging such devices in which two integrated circuits may each contain either a single LED or a plurality of LEDs and also either a single corresponding light detector or a plurality of corresponding light detectors. The LEDs are integrated onto the silicon substrate and may be fabricated by any number of means such as porous silicon, avalanching silicon PN junction, forward biased silicon PN junction, deposited silicon carbide junction, light emitting polymer, or deposited GaAs. This method of packaging thus accommodates a plurality of LED-detector pairs residing on two physically and electrically separate but optically linked silicon integrated circuits.
2. Prior Art
Most electronic opto couplers use discrete LEDs and silicon detectors. The LED is typically made from GaAs and the detector chip from silicon. The detector chip can either be a single discrete device such as a PN junction diode or a bipolar transistor or a detector device with additional support circuits such as amplifiers, buffers, etc. Also, the LED may require external buffers or driver circuits which are typically made from silicon. Because of the need to both electrically isolate each group of said devices and the different materials of the various components such as GaAs and silicon, hybrid techniques are used to fabricate these isolation devices. An added complication to the packaging of electrically isolated devices is the need to optically couple these devices.
In one packaging approach described in U.S. Pat. No. 5,049,527 the detector and its associated circuitry if present are placed on one portion of a lead frame and the GaAs LED and its associated circuitry if present are placed on another portion of the lead frame.
One portion of the lead frame is then bent 180xc2x0 so that the LED and detector are facing each other.
In another approach shown in U.S. Pat. No. 4,755,474 a transparent dielectric layer is placed on the silicon detector. A GaAs LED is then placed on top of the dielectric layer. This packaging concept is shown for a single discrete silicon detector and a single discrete LED.
Hybrid techniques have also been used for coupling light communication signals from LEDs or from light detectors to fiber optic cables such as that discussed in U.S. Pat. No. 4,904,036 and 4,186,994.
In U.S. Pat. No. 5,199,087 fiberoptic filaments are used to connect either LEDs or light detectors to wave guides for the purpose of making external connections. The methods used to connect the filament to the chip surface include fusing pressure and strength with epoxy glue.
Using light detectors in conjunction with high gain amplifiers, it is possible to use low efficiency silicon based LEDs, as well as more efficient GaAs LEDs which can be deposited on silicon, to realize signaling circuits which require electrical isolation. Silicon based LEDs include forward biased PN junction diodes, avalanche PN junction diodes, porous silicon diodes, and deposited silicon carbide diodes. For example, using two silicon integrated circuits with xe2x80x9con chipxe2x80x9d LEDs it is possible to build a telephone line interface circuit referred to as Data Access Arrangement (DAA), to build computer communications ports requiring isolation such as RS232, to build byte wide or larger bi-directional isolated digital ports, or to build optically isolated analog voltage sources.
The aforementioned patents do not address methods of packaging opto couplers in which LEDs are integrated onto silicon chips as well as light detectors. Also, these patents do not address the case in which there are multiple optical links between two silicon chips.
In one embodiment of the instant invention, a clear plastic device is made which includes one or a plurality of light waveguides to couple an LED of one chip to the light detector of another, waveguide supports, and die and waveguide positioning means. Both die use standard wire bonding on a lead frame for electrical connections.
In a second embodiment which is similar to the first embodiment an etched silicon trench is used to align the wave guide to the chip""s optical devices. The final step for both embodiments is to perform standard injection molding.
In a third embodiment one silicon integrated circuit die with appropriate optical devices is placed on a lead frame. A thick, transparent interlevel dielectric which is deposited using conventional silicon processing means is used as the isolation barrier. The top most metal level which is placed on top of the aforementioned thick dielectric layer is then used as a pad layer and a xe2x80x9cflip chipxe2x80x9d interconnect layer. The second die which is to be optically connected to the first die is then xe2x80x9cflip chipxe2x80x9d bonded to the pads of the aforementioned top most metal. The top most metal then provides another set of bondable pads leading out from the xe2x80x9cflip chipxe2x80x9d pads. These pads are then wire bonded to the lead frame. Optical coupling is achieved by the circuit side of each chip facing the other through a transparent insulator.
In a forth embodiment similar to the third embodiment a thin glass, plastic, or other suitable transparent insulator block or die is placed and glued onto the first silicon die. Metal is then deposited and patterned on top of transparent die such that the flip chip bonding of the second chip onto the transparent die is achieved. As before, the metal pattern brings out the flip chip bonding pads to wire bonding pads. In a variation of this approach, a thick deposited dielectric is used instead of the transparent die.
In a fifth embodiment of the instant invention, a first silicon chip with opto coupling elements such as LEDs and/or light detectors is mounted on a first lead frame and a second silicon chip with opto coupling elements corresponding to those of the first chip is mounted on a second lead frame. Each lead frame has metal leads going out on only one side of the frame. A block of a transparent insulating material is glued onto the circuit side of the first chip then the second side of the block is glued onto the circuit side of the second chip. Placing a hole in the chip attach pad of the lead frame allows alignment of the LED of one chip to the corresponding light detector of the second chip using infrared light Note that silicon is transparent to infrared thereby allowing one to see through the chip in areas not blocked by metal. Metal patterns on the chip can be used as alignment targets. The leads of the first chip are oriented in a direction opposite to the leads of the second chip. Plastic molding is then applied, supporting parts of the lead frame are cut away, and the leads are bent to form package pins. Since the lead frame heights of each chip are different, the leads coming out of each side of the package are of different lengths.
In a sixth embodiment the leads of the top chip are bent before molding so that both sets of package pins come out of the package at the same height.
In a seventh embodiment leads from each of the two chips come out on two sides of the package rather than from one side as in the first case. Thus, pins come out on four sides; two from a first chip and two from a second chip. This arrangement therefore accommodates more pins but with somewhat lower isolation voltage.
In an eighth embodiment leads come out from all four sides of each chip. This approach can accommodate more pins in a given area at the expense of reduced isolation voltage. The pins of each chip come out at different heights so that there are two different solder pad placements of the package leads.
It is another objective to show how a light guide can be created in the insulating barrier separating the two silicon chips. The light guide can improve the light coupling efficiency from an LED to a light detector over that of a simple transparent insulating barrier block.
U.S. Pat. No. 5,049,527.
U.S. Pat. No. 4,755,474.
U.S. Pat. No. 4,904,036.
U.S. Pat. No. 4,186,994.
U.S. Pat. No. 5,199,087.
A. Lacaita, F. Zappa, S. Bigliardi, and M. Manfredi, xe2x80x9cOn the Bremsstrahlung Origin of Hot-Carrier-Induced Photons in Silicon Devicesxe2x80x9d, IEEE Trans. Electron Devices, vol. ED-40, p. 577, 1993.